Modern telecommunication networks include packet switching networks for transmitting data from a source device to a destination device. The data is split up and encapsulated into data packets along with a destination address of the data. The packet switching network individually routes each data packet through a network of interconnected packet switches based on the destination address in the data packet. The data packets may be routed through different paths in the packet switching network and generally arrive at the destination device in an arbitrary order. At the destination device, the data is reconstructed from the data packets.
Conventional packet switches receive data packets, including a header indicating a desired destination egress port for the data packet, and generate and transmit to the central arbiter a request for a connection to the corresponding egress port. The central arbiter performs, in each of a number of clock cycles, an arbitration process to arbitrate among the requests it receives and determine which of the ingress ports will have access to the switch. Switch ingress ports typically request switch access for a predetermined block of switch bandwidth. Before a second block of bandwidth can be granted access by the arbiter, the original grant must be issued, the ingress port's grant request status must be updated based on receipt of the issued grant and a new grant request must be propagated through the switch's grant request processing pipeline and be selected for servicing. This process typically takes a number of clock cycles, thereby limiting the frequency with which a single ingress port can receive issued grants. Consequently, idle switch bandwidth blocks can be introduced which reduces the effective bandwidth of the switch and increases the latency between when data is presented to the switch and when it exits the switch.
In light of the above, a need exists in the art for a system and method that will allow grants to be issued to a single ingress port at any frequency, including on consecutive clock cycles, regardless of the grant request processing latency of the packet switch. Additionally, a need exists in the art for a system and method to insure that, even when grants are being issued at a high frequency, the grants are only issued to ports with sufficient data available to make use of the received grants.